“Animated processor”
Andrei Sergeevich Terechko, 2005
Keywords: interactive, device,
software
Description: “Animated
processor” is a hardware microprocessor, which inherits various human
qualities. Contemporary PC processors (like an Intel
Pentium or IBM PowerPC) have an
instruction set and state tailored towards computation. In contrast, the animated
processor possesses a human-like
“physiological” and “communicative” state comprised of the sleep_state, talk_state, drink_state and sex_state. It accepts external instructions (e.g. die, cry, booze, nap, etc.) that influence state transitions. Furthermore,
the processor generates output (e.g. invent, mutter, snore) reflecting the state transitions.
Despite humorous commands and states the animated processor demonstrates
the possibility of an artistic Integrated Circuit. Its execution and behavior
allegorically depict a sometimes illogical human being, by breaking free from
the conventional computational focus of the contemporary (PC) microprocessors.
It is remarkable how similar
hardware description and software languages are. Verilog, for example, highly resembles C concepts and syntax.
The Verilog code
can also be compiled, linked, and executed (in a simulator) just like any other
parallel program. Furthermore, a hardware description can be synthesized and
layouted to produce a GDSII file, which can control the IC production at an IC
factory. Although, due to its parallel nature hardware processors are complex
to design and debug, they pose numerous
opportunities for artistic expression like pure software. The author hopes
to see more art experiments with programmable Integrated Circuits in the
future.
Just like any hardware processor, the animated processor needs software
to operate. The author challenges programmers
to write artistic code for it. Below are several programs for the animated
processor.
Program 1. Reincarnation.
1. getborn // tells the processor to wake up
2. die // command to processor to stop executing (except resurrect)
3. resurrect // resurrect from death
4. die // and die again
Program 2. Looser.
1. getborn // tells the processor to wake up
2. bore // instruct the processor to get bored
3. again // repeat unknown number of times the previous command
4. booze // have a booze
5. again // drink again
6. nap // take a nap
7. die // and die
Program 3. Thinker.
1. getborn // tells the processor to wake up
2. bore // instruct the processor to get bored
3. again // repeat unknown number of times the previous command
4. ponder // think about life
5. hesitate // become unsure
6. ponder // think it over again
7. cry // and as a result of ponder, burst out in tears
8. again // can not stop…
9. dice // throw a dice whether to execute the next command or not
10. joke // cut out crying and say a joke
11. die // die
Source code can be downloaded from http://www.terechko.net/art/anim_proc/.
Usage: The rich
users of this processor can implement it in Silicon as an Integrated Circuit,
which will account for several hundred thousands euros. Another options is to
map the processor onto an FPGA (e.g. Xilinx or Altera),
resulting in a budget of a few hundred euros. The chippest solution would be to
use a Verilog
simulator (e.g. open-source icarus http://www.icarus.com/eda/verilog)
and simulate the processor.
To simplify the usage, a simple testbench animated_processor_tb is provided for the simulation. It feeds the
processor with various programs, which can be readily extended. Furthermore, a random
program generator is included in
the testbench, which will apply a random stream of instructions to the
processor. To enable the testbench define ART_SIMULATE.
The testbench contains also an instruction trace logger. To enable
define ART_TRACE_ON. An
example command line for ncverilog and ncsim (commercial Cadence
Verilog tools):
ncverilog +define+ART_SIMULATE +define+ART_TRACE_ON anim_proc.v
An execution trace for program 3. Thinker is presented below. Note that an instruction causes a
state transition, which becomes visible only in the next cycle. For example, in
cycle 8 instruction cry forces the talk state to flip to scream in cycle 9. The arrows depict some cause-effect dependencies
among the instructions and state transitions.
Execution traces for the other programs are presented below: Technical details: The animated
processor is written in a hardware description language Verilog and is fully synthesizable. The latter implies that
it can be realized in IC technology (like an Intel
Pentium) or FPGA. Currently, I don’t provide a compiler for the
processor, hence, writing code can be done only in binary code (or using the
constant defines from the source code). It is a challenge to write such a compiler
to translate, say, text, video or audio content into the machine instructions
of the animated processor. The Instruction Set Architecture of the animated processor comprises of 16 instructions, 4 states and 8
possible outputs. The binary encoding of the commands, states and outputs can
be found in the source code (see the section with `define). The processor includes a typical Program
Counter (PC) and a register to capture the death event.
Furthermore, control flow commands like dice and again are included. The instructions are: 1.
getborn: get born 2.
die: halt any activity, waiting for command resurrect 3.
resurrect: the only command letting the processor come
out of death 4.
bore: do nothing; equivalent to NOP (no operation) 5.
again: repeat the previous command a random number of times 6.
dice: roll dice to decide if to execute or skip the next command 7.
booze: consume alcohol 8.
ponder: ponder about the sense of life 9.
hesitate: stay unsure, insecure 10.
interpret: interpret the next command the way the
processor feels like 11.
lie: tell lies 12.
cry: burst out in tears 13.
joke: make jokes 14.
nap: take a nap 15.
fil: fall-in-love 16.
fuck: engage in a sexual intercourse State: 1.
drink_state: drunk thirsty normal sober 2.
talk_state: screaming
laughing whistling listening 3.
sleep_state: awake drowsy asleep snoring 4.
sex_state: horny
excited neutral impotent Output: 1.
beg: beg for money or software art ideas 2.
mutter: say something unclearly and seriously 3.
snore: snore loudly 4.
bullshit: talk absurd 5.
flirt: flirt passionately 6.
love: feel like engaging in a sexual intercourse 7.
invent: come up with absolutely new ideas 8.
itch: itch processor’s pins The processor was layouted in cmos12 IC technology. The clock frequency reaches 228 MHz,
the area is 10 µm2 with 277 logic gates
and 15 pins. Here is the layout figure of the processor: Acknowledgements: Maryia
Samailiuk
Intruction trace (random program)
Intruction trace (program 1)
Intruction trace (program 2)
Intruction trace (program 3)
Intruction trace (program 4)
